Driver circuit and method with reduced DI/DT and having...

Details Driver circuit and method with reduced DI/DT and having... Driver circuit and method with reduced DI/DT and having...

2005-11-02

2010-02-23

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Accelerating switching

C327S427000

Reexamination Certificate

active

07667524

ABSTRACT:
A method of driving a power transistor switch comprising: receiving a drive input signal; converting the drive input signal into a converted drive input signal; and providing the converted gate drive input signal to a control electrode of the switch to turn on the switch, the converted drive input signal having three regions with respect to time, each having a slope, a first region in time having a first slope up to a Miller Plateau of the switch; a second region in time having a second slope with a reduced slope compared with the first slope; and a third region having a third slope that is greater than the second slope, whereby the control electrode voltage rapidly reaches the Miller Plateau voltage, then more slowly reaches a threshold voltage of the switch and then, when the switch has substantially fully turned on, the control electrode voltage is rapidly increased. The switch delay time is also maintained substantially constant by adjusting the transistor control electrode precharge voltage.

REFERENCES:
patent: 5543739 (1996-08-01), Bontempo et al.
patent: 5656969 (1997-08-01), Pulvirenti et al.
patent: 6271709 (2001-08-01), Kimura et al.
patent: 6333665 (2001-12-01), Ichikawa
patent: 6407594 (2002-06-01), Milazzo et al.
patent: 2004/0145406 (2004-07-01), Tai

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