Circuits and methods for recovering a clock signal

Details Circuits and methods for recovering a clock signal Circuits and methods for recovering a clock signal

2005-07-05

2010-02-02

Ahn, Sam K (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

Reexamination Certificate

active

07656984

ABSTRACT:
A circuit for recovering a clock signal may include a frequency multiplier configured to generate a plurality of local clock signals, each having a different phase, based on a plurality of received global clock signals at a first frequency and each having a different phase. The local clock signals may be generated at a second frequency higher than the first frequency. The circuit may include a phase interpolator configured to generate a recovered clock signal at a given phase and at a third frequency, based on the generated local clock signals, and a phase shifter configured to adjust the phase of the recovered clock signal so as to synchronize the phase of the recovered clock signal with a phrase of input data that is input to the phase shifter.

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Jafar Savoj et al., “Design Of Half-Rate Clock And Data Recovery Circuits For Optical Communication Systems”, Jun. 18-22, 2001.

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