Methods and apparatus for improved memory access

Details Methods and apparatus for improved memory access Methods and apparatus for improved memory access

2007-05-29

2010-10-05

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

With shift register

C365S185110, C365S233100

Reexamination Certificate

active

07808844

ABSTRACT:
A memory access scheme employing one or more sets of shift registers interconnected in series to which data may be loaded from or written into one or more memory devices. That is, data from the memory devices may be parallel loaded into the sets of shift registers and then serially shifted through the shift registers until it is output from the sets of shift registers and transferred to its destination. Additionally, the data may be read from and loaded into the memory devices to/from the sets of shift registers such that the shifting of the shift registers is uninterrupted during the reading and/or loading of data. Additionally, data from the memory devices may be loaded into two or more parallel chains of shift registers and then serially shifted through the shift register chains.

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