Method for fabricating semiconductor devices by use of an N.sup.

Details Method for fabricating semiconductor devices by use of an N.sup. Method for fabricating semiconductor devices by use of an N.sup.

1990-04-30

1992-05-26

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 33, 437 59, 437 77, H01L 2176

Patent

active

051167778

ABSTRACT:
An N.sup.+ buried layer is formed under all the N-channel devices in the memory array of an integrated circuit device. The N.sup.+ buried layer can also be formed under N-channel input/output devices. The N.sup.+ buried layers include contacts to the power supply. Such a device layout provides for complete isolation of the memory array from the remainder of the circuitry. The isolation of the N-channel input/output devices also provides for enhanced immunity to input/output noise.

REFERENCES:
patent: 3802968 (1974-04-01), Ghosh et al.
patent: 4016596 (1977-04-01), Magdo et al.
patent: 4403395 (1983-09-01), Curran
patent: 4825274 (1989-04-01), Higuchi et al.
patent: 4855244 (1989-08-01), Hutter et al.
patent: 4868626 (1989-09-01), Nakazato et al.
patent: 4887142 (1989-12-01), Bertotti et al.
patent: 4892836 (1990-01-01), Andreini et al.
patent: 4903093 (1990-02-01), Ide et al.
patent: 4912054 (1990-03-01), Tomassetti

Affiliated with

Also associated with

Rating

Method for fabricating semiconductor devices by use of an N.sup. does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for fabricating semiconductor devices by use of an N.sup., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for fabricating semiconductor devices by use of an N.sup. will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-419365