Method and apparatus for supporting very large transactions

Details Method and apparatus for supporting very large transactions Method and apparatus for supporting very large transactions

2007-03-06

2010-06-15

Tran, Denise (Department: 2189)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

Reexamination Certificate

active

07739456

ABSTRACT:
One embodiment of the present invention provides a system that executes a transaction on a multi-threaded processor. The system starts by executing the transaction in a “transaction-pending mode,” which involves placing load-marks or store-marks on cache lines loaded from or stored to during transaction-pending mode and also buffers store operations in a store queue. Upon encountering a store queue overflow, the system continues to execute the transaction in a “store-queue-overflow mode,” which involves placing load-marks or store-marks on cache lines loaded from or stored to during store-queue-overflow mode and discards store data which does not fit into the store queue during store operations. Upon completing the transaction in the store-queue-overflow mode, the system re-executes the transaction in a “repeating-transaction mode,” which involves executing the instructions in the transaction non-speculatively, which allows the store operations to commit to the memory hierarchy.

REFERENCES:
patent: 7293161 (2007-11-01), Chaudhry et al.
patent: 7484080 (2009-01-01), Chaudhry et al.
patent: 7523266 (2009-04-01), Chaudhry et al.
patent: 2001/0014941 (2001-08-01), Akkary et al.

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