Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-11-21
2010-02-02
Smith, Bradley K (Department: 2894)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE21619
Reexamination Certificate
active
07655972
ABSTRACT:
The present invention provides a method in which a low-resistance connection between the MOS channel and silicided source/drain regions is provided that has an independence from the extension ion implant process as well as device overlap capacitance. The method of the present invention broadly includes selectively removing outer spacers of an MOS structure and then selectively plating a metallic or intermetallic material on exposed portions of a semiconductor substrate that were previously protected by the outer spacers. The present invention also provides a semiconductor structure that is formed utilizing the method. The semiconductor structure includes a low-resistance connection between the silicided source/drain regions and the channel regions which includes a selectively plated metallic or intermetallic material.
REFERENCES:
patent: 4692349 (1987-09-01), Georgiou et al.
patent: 4873557 (1989-10-01), Kita
patent: 4877644 (1989-10-01), Wu et al.
patent: 5260108 (1993-11-01), Braren et al.
patent: 6025620 (2000-02-01), Kimura et al.
patent: 6063681 (2000-05-01), Son
patent: 6180469 (2001-01-01), Pramanick et al.
patent: 6369429 (2002-04-01), Pramanick et al.
patent: 6399467 (2002-06-01), Erhardt et al.
patent: 6787422 (2004-09-01), Ang et al.
patent: 6908847 (2005-06-01), Saito et al.
patent: 2002/0109196 (2002-08-01), Fujisawa et al.
patent: 2003/0162359 (2003-08-01), Yang et al.
patent: 2003/0183881 (2003-10-01), Lee et al.
patent: 2003/0218209 (2003-11-01), D'Anna et al.
patent: 2004/0089878 (2004-05-01), Takehashi et al.
“Circuit Repair Using Palladium Seeding and Selective Electroless Plating,” Vigliotti, DR et al., IBM Technical Disclosure Bulletin, v37 n6B Jun. 1994 p. 443-444.
“Development of Photoexcited Surface Modification Technology Utilizing Modulator Radiation,” Y. Tsutsui et al., Sumitomo Electric Industries Tech. Rev. (Japan), No. 45, Jan. 1998, p. 169-74.
Chidambarrao Dureseti
Radens Carl
Abate Esq. Joseph P.
International Business Machines - Corporation
Movva Amar
Scully , Scott, Murphy & Presser, P.C.
Smith Bradley K
LandOfFree
Structure and method for MOSFET with reduced extension... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Structure and method for MOSFET with reduced extension..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure and method for MOSFET with reduced extension... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4185351