Through substrate via process

Details Through substrate via process Through substrate via process

2008-10-09

2010-12-07

Richards, N Drew (Department: 2895)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

Reexamination Certificate

active

07846837

ABSTRACT:
A through substrate via (TSV) process is provided. A substrate having a first side and a second side opposite the first side is provided. A plurality of holes is formed in the substrate at the first side. A first dielectric layer is formed on a sidewall and a bottom of the holes. A second dielectric layer is formed in the holes, wherein a material of the second dielectric layer is different from that of the first dielectric layer. A semiconductor device and an interconnect are formed on the substrate at the first side. At least a portion of the substrate at the second side is removed to expose the second dielectric layer in the holes. The second dielectric layer is removed. A conductive layer is formed in the holes.

REFERENCES:
patent: 2006/0177999 (2006-08-01), Hembree et al.
patent: 2008/0280435 (2008-11-01), Klootwijk et al.
patent: 2009/0283871 (2009-11-01), Chang et al.
Jackson et al. (“Processing an integration of copper interconnects” Solid State Technology Mar. 1998).
Jean-Christophe Eloy, “3D IC & TSV Packaging: Market drivers, Cost, Technologies & Forecasts,” ITRI—3D Workshop, Mar. 2008, Taipei.

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