Parasitic effects analysis of circuit structures

Details Parasitic effects analysis of circuit structures Parasitic effects analysis of circuit structures

2007-12-21

2010-12-14

Kik, Phallaka (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C703S016000

Reexamination Certificate

active

07853910

ABSTRACT:
Method, system, and computer program product for analyzing circuit structures for parasitic effects are provided. Data from a previous parasitic effect analysis of a circuit structure is used to perform parasitic effect analysis on another circuit structure even when the circuit structures are not identical, provided the circuit structures are similar.

REFERENCES:
patent: 6128768 (2000-10-01), Ho
patent: 6421814 (2002-07-01), Ho
patent: 6539524 (2003-03-01), Walden
patent: 6877148 (2005-04-01), Hassibi et al.
patent: 7451412 (2008-11-01), Jones et al.
patent: 2003/0154457 (2003-08-01), Armbruster
patent: 2007/0033561 (2007-02-01), Jones et al.
patent: 2008/0133202 (2008-06-01), Tseng et al.
patent: 2008/0265361 (2008-10-01), Krauss
patent: 2009/0033398 (2009-02-01), Dennis et al.
Nabors, Keith, et al., , “Fast Capacitance Extraction of General Three-Dimensional Structures,” IEEE Trans. on Microwave Theory and Techniques, Jul. 1992, vol. 40, No. 7, p. 1496-1507.
Shi, Weiping, et al., “A Fast Hierarchical Algorithm for 3-D Capacitance Extraction”, IEEE Transactions on Computer-Aided Design of Integraeted Circuits and Systems, vol. 21, No. 3, Mar. 2002, pp. 330-336.
Kapur, Sharad, et al., “Large-Scale Full-Wave Simulation”, Proceedings of the 41st Design Automation Conference, 2004, pp. 806-809.
Parks, Michael L., et al., “Recycling Krylov Subspaces for Sequences of Linear Systems”, SIAM Journal on Scientific Computing, vol. 28, No. 5, pp. 1651-1674, 2006.
Telichevesky, Ricardo, et al., “Efficient AC and Noise Analysis of Two-tone RF Circuits,” Proceedings of the 33rd Design Automation Conference, Jun. 2006, pp. 292-297.

Affiliated with

Also associated with

Rating

Parasitic effects analysis of circuit structures does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Parasitic effects analysis of circuit structures, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Parasitic effects analysis of circuit structures will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4170940