Semiconductor memory device having I/O unit

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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C365S189050

Reexamination Certificate

active

07839709

ABSTRACT:
A semiconductor memory device is capable of reducing a test time upon the same condition of the actual operation thereof. The semiconductor memory device includes an output data select unit and a data output unit. The output data select unit selectively outputs valid data, which are loaded on a plurality of global lines, in response to an output control signal activated after a delay time corresponding to an additive latency from entry of a read operation in a test mode. The data output unit aligns data outputted from the output data select unit and outputs the aligned data through data pads.

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patent: 2005/0213397 (2005-09-01), Santin
patent: 2006/0123291 (2006-06-01), Kim
patent: 2007/0121397 (2007-05-01), Lee et al.
patent: 2007/0260925 (2007-11-01), Do
patent: 100269299 (2000-07-01), None
patent: 1020050011942 (2005-01-01), None

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