Plasma treatment and repair processes for reducing sidewall...

Details Plasma treatment and repair processes for reducing sidewall... Plasma treatment and repair processes for reducing sidewall...

2007-07-11

2010-06-22

Vu, David (Department: 2818)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C257S759000, C257SE21579

Reexamination Certificate

active

07741224

ABSTRACT:
A method of forming an interconnect structure for an integrated circuit, including the steps of providing a substrate and forming a dielectric stack on the substrate including an etch-stop layer, a low-k dielectric layer, and a hardmask layer. The method further includes the steps of patterning a photoresist masking layer on the dielectric stack to define a plurality of feature defining regions and plasma processing the substrate in a plasma-based reactor, The processing step includes etching a plurality of features into the hardmask layer and at least a portion of the low-k dielectric layer and performing a plasma treatment process in situ in the plasma-based reactor, where the plasma treatment process includes flowing at least one hydrocarbon into the reactor and generating a plasma, where a mass flow rate of the hydrocarbon is at least 0.1 sccm. The method also includes forming a metal conductor in the plurality of features.

REFERENCES:
patent: 6838300 (2005-01-01), Jin et al.
patent: 7135402 (2006-11-01), Lin et al.
patent: 2006/0194447 (2006-08-01), Ruan et al.
patent: 2007/0077751 (2007-04-01), Chen et al.
patent: 2007/0224824 (2007-09-01), Chen et al.

Affiliated with

Also associated with

Rating

Plasma treatment and repair processes for reducing sidewall... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Plasma treatment and repair processes for reducing sidewall..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Plasma treatment and repair processes for reducing sidewall... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4150865