Stressed SOI FET having tensile and compressive device regions

Details Stressed SOI FET having tensile and compressive device regions Stressed SOI FET having tensile and compressive device regions

2007-02-12

2009-12-15

Cao, Phat X (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S154000, C257SE21630

Reexamination Certificate

active

07632724

ABSTRACT:
A method is provided for fabricating a field effect transistor (“FET”) having a channel region in a semiconductor-on-insulator (“SOI”) layer of an SOI substrate. Desirably, in such method, a sacrificial stressed layer is formed to overlie a first portion of an active semiconductor region but not overlie second portion of the active semiconductor region which shares a common boundary with the first portion. After forming trenches in the SOI layer, the SOI substrate is heated with the stressed layer thereon sufficiently to cause the stressed layer to relax, thereby causing the stressed layer to apply a first stress to the first portion and to apply a second stress to the second portion. For example, when the first stress is tensile, the second stress is compressive, or the first stress can be compressive when the second stress is tensile. Desirably, the stressed layer is then removed to expose the first and second portions of the active semiconductor region. Desirably, the field effect transistor (“FET”) is formed to include (i) a source region in the first portion, (ii) a drain region in the first portion, and (iii) a channel region in the second portion.

REFERENCES:
patent: 7432149 (2008-10-01), Wu et al.
patent: 2005/0285187 (2005-12-01), Bryant et al.
patent: 2006/0001089 (2006-01-01), Bedell et al.
patent: 2006/0049429 (2006-03-01), Kim et al.
patent: 2006/0214232 (2006-09-01), Chen et al.
patent: 2007/0026629 (2007-02-01), Chen et al.
patent: 2008/0191285 (2008-08-01), Ko et al.
International Search Report and Written Opinion in PCT/US2008/053152 mailed May 22, 2008.

Affiliated with

Also associated with

Rating

Stressed SOI FET having tensile and compressive device regions does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Stressed SOI FET having tensile and compressive device regions, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Stressed SOI FET having tensile and compressive device regions will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4149681