Digital transmit phase trimming

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S376000

Reexamination Certificate

active

07627069

ABSTRACT:
A circuit has a phase adjustment circuit to generate an adjusted clock signal by adjusting a first clock signal in accordance with a control signal. A multiplexer receives input data signals on a plurality of first data lines and outputs onto at least one second data line output data signals in accordance with a plurality of second clock signals. A timing measurement circuit determines at least one timing parameter of at least one output data signal on at least the one second data line and generates the control signal in accordance with a deviation of at least the one timing parameter from a desired value.

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