Semiconductor device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S066000, C257S072000

Reexamination Certificate

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07638846

ABSTRACT:
The present invention provides a semiconductor device in which a bottom-gate TFT or an inverted, stagger TFT arranged in each circuit is suitably constructed in conformity with the functionality of the respective circuits, thereby attaining an improvement in the operating efficiency and reliability of the semiconductor device. In the structure, LDD regions in a pixel TFT are arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in an N-channel TFT of a drive circuit is arranged so as not to overlap with a channel protection insulating film and to overlap with a gate electrode by at least a portion thereof. LDD regions in a P-channel TFT of the drive circuit is arranged so as to overlap with a channel protection insulating film and to overlap with the gate electrode.

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Hatano et al., “A Novel Self-Aligned Gate-Overlapped LLD Poly-Si TFT With High Reliability and Performance”, IDEM Technical Digest 97, pp. 523-526.
Hatano et al., “A Novel Self-Aligned Gate-Overlapped LDD Poly-Si TFT With High Reliability and Performance”, IEDM 97: Technical Digest of International Electron Devices Meeting, pp. 523-526.

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