Method of fabricating a vertically mountable IC package

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S637000

Reexamination Certificate

active

07494920

ABSTRACT:
A method of fabricating a vertically mountable integrated circuit (IC) package is presented. An integrated circuit is mounted on a printed circuit board (PCB) and electrically coupled to a bond pad on the PCB. The bond pad is coupled with a via that is embedded in the PCB. The IC, the bond pad, the via, and a portion of the PCB are singulated in order to create a vertically mountable IC package. The via is cut through cross-sectionally during singulation so as to expose a portion of the via and thereby provide a mountable area for the IC package. The IC package may be encapsulated or housed in a dielectric material. In addition, the via may be treated with a preservative or other s-uitable electroless metal plating deposition that prevents oxidation and promotes solderability.

REFERENCES:
patent: 5490324 (1996-02-01), Newman
patent: 6492600 (2002-12-01), Jimarez et al.
patent: 6524644 (2003-02-01), Wengenroth
patent: 6783654 (2004-08-01), Inoue et al.
patent: 2002/0006503 (2002-01-01), Watanabe et al.
patent: 2002/0117753 (2002-08-01), Lee et al.
patent: 2003/0011075 (2003-01-01), Ohuchi et al.
patent: 2004/0094832 (2004-05-01), Tao
CB Industry Links, printed from the World Wide Web on Nov. 1, 2004, < http://dcchapters.ipc.org/html/pwblinks.htm>, p. 20.
Stafstrom, Eric, et al., “Reducing Solder Voids With Copper-Filled Microvias,” Circuits Assembly, Apr. 2003, pp. 22-24.
European Search Report for 06122283.2-1528 dated Jan. 23, 2008.

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