Output level stabilization circuit and CML circuit using the...

Details Output level stabilization circuit and CML circuit using the... Output level stabilization circuit and CML circuit using the...

2008-02-15

2009-10-27

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S027000, C326S115000

Reexamination Certificate

active

07609084

ABSTRACT:
An output level stabilization circuit being an output level stabilization circuit for a CML circuit, the output level stabilization circuit includes: a replica circuit constituted of transistors respectively having the same characteristics as one of differential-pair transistors of the CML circuit and a current source transistor; a comparison circuit which compares an output of the replica circuit with a reference voltage and supplies the comparison result as a control voltage for the current source transistor of the replica circuit; and a variable impedance circuit arranged between the output of the replica circuit and an input of the comparison circuit.

REFERENCES:
patent: 7425847 (2008-09-01), Dimitriu
patent: 2-73827 (1990-06-01), None
patent: 7-307658 (1995-11-01), None

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