Manufacturing process for a transistor made of thin layers

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S738000

Reexamination Certificate

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07491644

ABSTRACT:
A process for fabricating a transistor that includes a gate located in the immediate proximity of a dielectric includes a step of etching a layer of gate material. The gate etching step includes plasma etching of the gate layer over the major portion of its thickness so as to laterally define the gate and chemical etching of a residual portion of the gate layer so as to define the gate as far as the dielectric.

REFERENCES:
patent: 5599725 (1997-02-01), Dorleans et al.
patent: 5660681 (1997-08-01), Fukuda et al.
patent: 6261934 (2001-07-01), Kraft et al.
patent: 2004/0113171 (2004-06-01), Chiu et al.
patent: 2004/0197977 (2004-10-01), Deleonibus
patent: 6-1129872 (1986-06-01), None
Desvoivres et al., “Sub-0.1 μm gate etch processess: Towards some limitations of the plasma technology?,” J. Vol. Sci. Technicol. B 18(1), Jan./Feb. 2000, pp. 156-165.

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