Method for manufacturing recess gate in a semiconductor device

Details Method for manufacturing recess gate in a semiconductor device Method for manufacturing recess gate in a semiconductor device

2006-12-28

2009-08-25

Booth, Richard A. (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

Insulated gate formation

C257SE21176

Reexamination Certificate

active

07579265

ABSTRACT:
A method for manufacturing a recess gate in a semiconductor device includes forming a device isolation structure on a substrate to define an active region, forming a hard mask pattern over the substrate to selectively expose at least a portion of the active region, forming a recess pattern in the active region through an etching process using the hard mask pattern as an etch barrier, removing the hard mask pattern, forming a gate insulating layer over the substrate, and forming a gate electrode over the gate insulating layer to cover at least the recess pattern.

REFERENCES:
patent: 6861701 (2005-03-01), Williams et al.
patent: 2001/0009800 (2001-07-01), Hijzen et al.
patent: 2006/0049455 (2006-03-01), Jang et al.
patent: 2006/0216885 (2006-09-01), Lee
patent: 2006-173429 (2006-06-01), None
patent: 10-2005-0027381 (2005-03-01), None
patent: 10-2006-0062358 (2006-06-01), None
English-language translation of the Notification of First Office Action from the State Intellectual Property Office of the People's Republic of China mailed Jan. 16, 2009, in Chinese Patent Application No. 2007100900448.

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