Transistor assembly and method of its fabrication

Details Transistor assembly and method of its fabrication Transistor assembly and method of its fabrication

2006-01-09

2009-08-25

Smith, Matthew (Department: 2823)

Semiconductor device manufacturing: process

Chemical etching

Altering etchability of substrate region by compositional or...

C438S156000, C438S173000, C438S269000, C438S272000, C257SE21643, C977S938000

Reexamination Certificate

active

07579281

ABSTRACT:
A transistor assembly with semiconductor material vertically introduced into micro holes (4) in a pliable a film laminate consisting of two plastic films (1, 3) with a metal layer (2) located therebetween. Said semiconductor material is provided with contacts (6, 7) by metalizing the top side and bottom side of the film laminate. The assembly is very strong by virtue of the fact that the film can be bent and stretched.

REFERENCES:
patent: 4530149 (1985-07-01), Jastrzebski et al.
patent: 5106778 (1992-04-01), Hollis et al.
patent: 5324673 (1994-06-01), Fitch et al.
patent: 5414289 (1995-05-01), Fitch et al.
patent: 5668391 (1997-09-01), Kim et al.
patent: 5739044 (1998-04-01), Terasawa et al.
patent: 5981970 (1999-11-01), Dimitrakopoulos et al.
patent: 6107660 (2000-08-01), Yang et al.
patent: 6392271 (2002-05-01), Alavi et al.
patent: 6426259 (2002-07-01), Yu
patent: 6653733 (2003-11-01), Gonzalez et al.
patent: 6740910 (2004-05-01), Roesner et al.
patent: 7067840 (2006-06-01), Klauk et al.
patent: 2005/0071969 (2005-04-01), Sirringhaus et al.
patent: 19916403 (2000-10-01), None
patent: 614017 (1986-01-01), None
patent: 11329334 (1999-11-01), None
patent: WO0149402 (2001-07-01), None
patent: 0229912 (2002-04-01), None
S.M. Sze: “Physics of Semiconductor Devices”, Second Edition, Bell Laboratories, Inc, Murray Hill, New Jersey, Wiley, New York, 1981, pp. 312-314 and pp. 431-433 (including front and back cover sheets).
Kudo et al.: “Device characteristics of lateral and vertical type organic field effect transistors”, Chiba University, Chiba, Japan, Eslevier, Thin Solid Films, 2001, pp. 362-367.
Garnier et al.: “Vertical device architecture by molding of organic-based thin film transistor”, Applied Physics Letters, vol. 73, No. 12, Sep. 21, 1998, pp. 1721-1723.
International Search Report: Application No. PCT/DE 02/03191, Mailing Date: Nov. 29, 2002.
C. Rost et al., “Spatially distributed p-n heterojunction based on nanoporous TiO2 and CuSCN”, Applied Physics Letters, vol. 75, No. 5, Aug. 2, 1999, pp. 692-694.

Affiliated with

Also associated with

Rating

Transistor assembly and method of its fabrication does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Transistor assembly and method of its fabrication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Transistor assembly and method of its fabrication will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4124007