Semiconductor device and method for manufacturing the same

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S637000, C438S638000, C257S758000, C257S760000, C257S762000

Reexamination Certificate

active

07572728

ABSTRACT:
A semiconductor device and method with a dual damascene pattern uses buffer layers to prevent photoresist layer poisoning due to a reaction between an interlayer dielectric and a photoresist layer. Embodiments also relate to reducing the effects of plasma damage occurring during an etching or ashing process.

REFERENCES:
patent: 6103616 (2000-08-01), Yu et al.
patent: 6372653 (2002-04-01), Lou et al.
patent: 6767827 (2004-07-01), Okada et al.
patent: 2003/0219973 (2003-11-01), Townsend et al.
patent: 2006/0019491 (2006-01-01), Soda
patent: 2006/0063393 (2006-03-01), Shaffer et al.

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