Dual gate dielectric thickness devices and circuits using...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S392000, C257S401000, C257S402000

Reexamination Certificate

active

07615827

ABSTRACT:
Dual thickness devices and circuits using dual gate thickness devices. The devices include: one or more FETs of a first polarity and one or more FETs of a second and opposite polarity, the one or more FETs of the first polarity electrically connected to the one or more FETs of the second polarity in a same circuit, at least one of the one or more FETs of the first polarity having a gate dielectric consisting of a single layer of thermal silicon oxide and having a thickness different from a thickness of a gate dielectric consisting of a single layer of thermal silicon oxide of at least one of the one or more FETs of the second polarity.

REFERENCES:
patent: 6191049 (2001-02-01), Song
patent: 6248618 (2001-06-01), Quek et al.
patent: 6602751 (2003-08-01), Oohashi
patent: 6653192 (2003-11-01), Ryoo
patent: 6716685 (2004-04-01), Lahaug
patent: 2001/0031523 (2001-10-01), Kimizuka
patent: 2001/0034093 (2001-10-01), Matsuzaki et al.
patent: 2003/0210070 (2003-11-01), Salcido et al.

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