Semiconductor wafer and semiconductor device, and method for...

Details Semiconductor wafer and semiconductor device, and method for... Semiconductor wafer and semiconductor device, and method for...

2006-12-05

2009-11-10

Dang, Phuc T (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

C257S057000, C257S060000, C438S017000, C438S018000, C324S765010

Reexamination Certificate

active

07615781

ABSTRACT:
There is a room for improvement in conventional semiconductor devices in terms of reducing the chip area. A semiconductor device1comprises an evaluation transistor10(first characteristic evaluation device), an evaluation transistor (second characteristic evaluation device), measurement pads30(first measurement pads) and measurement pads40(second measurement pads). The measurement pad30and the measurement pad40are provided in different layers in the interconnect layer.

REFERENCES:
patent: 6747471 (2004-06-01), Chen et al.
patent: 6950356 (2005-09-01), Tao
patent: 2006/0138614 (2006-06-01), Kimura
patent: 2007/0109003 (2007-05-01), Shi et al.
patent: 2000-214228 (2000-08-01), None
patent: 2000-260823 (2000-09-01), None

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