Method and apparatus for using multiple threads to...

Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...

Reexamination Certificate

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C712S229000, C712S218000

Reexamination Certificate

active

07634641

ABSTRACT:
One embodiment of the present invention provides a system which performs simultaneous speculative threading. The system staffs by executing instructions in normal execution mode using a first thread. Upon encountering a data-dependent stall condition, the first thread generates an architectural checkpoint and commences execution of instructions in execute-ahead mode. During execute-ahead mode, the first thread executes instructions that can be executed and defers instructions that cannot be executed into a deferred queue. When the data dependent stall condition has been resolved, the first thread generates a speculative checkpoint and continues execution in execute-ahead mode. At the same time, the second thread commences execution in a deferred mode. During execution in the deferred mode, the second thread executes instructions deferred by the first thread.

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