Semiconductor integrated circuit and image processing system...

Details Semiconductor integrated circuit and image processing system... Semiconductor integrated circuit and image processing system...

2005-10-18

2009-11-17

Cao, Chun (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Multiple or variable intervals or frequencies

C711S169000

Reexamination Certificate

active

07620838

ABSTRACT:
A circuit system is provided capable of improving the throughput thereof by eliminating the operational constraint that if the operating frequency of a content addressable memory is lower than the operating frequency of a system LSI, two system clocks should be provided, or the higher frequency should be synchronized with the slower system clock. A clock control circuit (103) for down-converting an internal clock (Φ1) of a LSI (101) is provided, and a control signal whose frequency is made lower is used to operate a content addressable memory circuit (102).

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Office Action in Japanese Application No. 2004-303648, dispatched Apr. 21, 2009.

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