Counter capable of holding and outputting a count value and...

Details Counter capable of holding and outputting a count value and... Counter capable of holding and outputting a count value and...

2006-12-11

2009-06-30

Cox, Cassandra (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Using shift register

C377S064000

Reexamination Certificate

active

07555094

ABSTRACT:
Example embodiments may provide a counter capable of outputting a count value after holding the count value for an amount of time and a phase locked loop (PLL) including the counter. The counter may include a selection unit that may selectively output a clock signal and a hold signal in response to a selection signal and a counting unit that may perform a counting operation in response to the clock signal and output a count value obtained by the counting operation after holding the count value for an amount of time in response to the hold signal. The counter may stably output an accurate count value regardless of transmission delays.

REFERENCES:
patent: 5848074 (1998-12-01), Maeno
patent: 6661294 (2003-12-01), Terashima et al.
patent: 7292177 (2007-11-01), Muramatsu et al.
patent: 7308634 (2007-12-01), Kiryu
patent: 2005/0068111 (2005-03-01), Kasahara et al.
patent: 10-075174 (1998-03-01), None
patent: 2002-314411 (2002-10-01), None
patent: 10-0266691 (1998-06-01), None
patent: 10-2003-0084739 (2003-11-01), None

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