Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-08-10
2009-08-04
Ha, Nathan W (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE21632
Reexamination Certificate
active
07569888
ABSTRACT:
Aspects of the present disclosure are generally directed to FETs with stress liners that are closer than typical stressed FETs, as well as methods for manufacturing the same. FETE channel sidewall spacers may be removed, or substantially reduced in width, prior to forming the stress liners. This may be performed without destroying the underlying thin oxide layer. The sidewall spacers may be removed substantially reduced either prior to or after silicide formation. Where the sidewall spacers are removed prior to silicide formation, a relatively thin oxide layer on opposing sides of the channel may be used as a mask when forming the silicide. In addition, devices having both an NFET with a closer-than-typical tensile liner and a PFET with a closer-than-typical compressive liner, as well as methods for manufacturing the same, are disclosed.
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Banner & Witcoff , Ltd.
Ha Nathan W
Toshiba America Electronic Components Inc.
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