Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
2003-12-10
2009-02-03
Vinh, Lan (Department: 1792)
Semiconductor device manufacturing: process
Chemical etching
C438S592000, C438S595000, C438S696000, C438S701000, C438S712000, C438S733000, C216S037000, C216S058000, C216S067000, C430S313000, C430S317000
Reexamination Certificate
active
07485579
ABSTRACT:
In performing an anisotropic etching process after a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, a portion that is not etched is left at an edge of a second conductive film to shorten an LDD region. It is an object to make the LDD region longer by reducing or removing the left portion that is not etched. After a taper etching process of a gate conductive layer of a two-layer or three-layer laminated structure, an argon plasma treatment is performed. With this argon plasma treatment, a reactive organism in the taper etching process is removed, and it becomes possible to reduce or remove the left portion that is not etched in the anisotropic etching to be performed next.
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Monoe Shigeharu
Sasagawa Shinya
Yokoshima Takashi
Angadi Maki
Costellia Jeffrey L.
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
Vinh Lan
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