Primitive cell that is robust against ESD

Details Primitive cell that is robust against ESD Primitive cell that is robust against ESD

2006-02-13

2009-11-24

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Device protection

C257S206000, C257S369000, C257S401000, C257SE27081, C257SE29134

Reexamination Certificate

active

07622755

ABSTRACT:
A primitive cell having a gate pattern that is robust against ESD is provided. The primitive cell comprises: a high finger PMOS transistor and a low finger NMOS transistor. The high finger PMOS transistor has a first terminal connected to a high power source, and a gate to which a control voltage is applied and which has a plurality of fingers. The low finger NMOS transistor has a first terminal connected to a low power source, a gate to which the control voltage is applied and which has a plurality of fingers, and a second terminal connected to a second terminal of the PMOS transistor. The number of the fingers of the gate of the NMOS transistor is smaller than the number of fingers of the gate of the PMOS transistor and the length of each of the fingers of the NMOS transistor is greater than the length of each of the fingers of the PMOS transistor.

REFERENCES:
patent: 6838708 (2005-01-01), Lin et al.
patent: 2000-058660 (2000-02-01), None
patent: 2002-134720 (2002-05-01), None
patent: 1019930008907 (1993-09-01), None
patent: 1020010029998 (2001-04-01), None

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