Process for fabricating multilayer connection

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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438626, 438627, 438629, 438633, 438643, 438645, 438653, 438669, 438672, H01L 214763

Patent

active

059077875

ABSTRACT:
A process for fabricating multilayer connection which provides a flattened surface of an interlayer insulating film and realizes a highly reliable semiconductor device, including: forming an interlayer dielectric film on a lower layer connection and forming an aperture portion in the interlayer dielectric film, the aperture portion being connected to the lower layer connection; forming a metallic film on the entire surface of the interlayer dielectric film inclusive of the aperture portion, thereby filling the aperture portion with a material constituting the metallic film; removing the metallic film from the interlayer dielectric film by etching, except for the metallic film material left over inside the aperture portion; flattening the surface by applying chemical mechanical polishing to the upper surface of the interlayer dielectric film; and forming an upper layer connection on the interlayer dielectric film, the upper layer connection being connected to the metallic film material left over inside the aperture portion.

REFERENCES:
patent: 4948459 (1990-08-01), Van Laarhoven et al.
patent: 5244534 (1993-09-01), Yu et al.
patent: 5286675 (1994-02-01), Chen et al.
patent: 5288665 (1994-02-01), Nulman
patent: 5527739 (1996-06-01), Parillo et al.

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