Static information storage and retrieval – Addressing – Plural blocks or banks
Reexamination Certificate
2007-01-04
2009-08-25
Nguyen, Dang T (Department: 2824)
Static information storage and retrieval
Addressing
Plural blocks or banks
C365S149000, C365S185130
Reexamination Certificate
active
07580314
ABSTRACT:
A memory device includes a plurality of memory blocks. Each memory block includes a plurality of bit lines, a plurality of word lines, a plurality of memory cells provided at intersections of the bit lines and word lines; a plurality of capacitors, and a plurality of sense amplifiers. Each sense amplifier has a first input and a second input. The first input is connected to a first bit line of a first one of the memory blocks and is coupled via one of the capacitors to a first bit line of a second one of the memory blocks. The second input of the input is connected to a second bit line of the second one of the memory blocks and is coupled via one of the capacitors to a second bit line of the first one of the memory blocks.
REFERENCES:
patent: 7221605 (2007-05-01), Forbes
patent: 2004/0228195 (2004-11-01), McElroy et al.
patent: 09-0213069 (1997-08-01), None
patent: 2006-013536 (2006-01-01), None
patent: 10-0282693 (2000-11-01), None
patent: 10-0287546 (2001-01-01), None
patent: 10-2002-0036296 (2002-05-01), None
patent: 10-2005-0073092 (2005-07-01), None
Kim Su-A
Song Ki-Whan
Nguyen Dang T
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
LandOfFree
Memory device having open bit line structure and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Memory device having open bit line structure and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory device having open bit line structure and method of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4080785