Semiconductor package and fabrication method thereof

Details Semiconductor package and fabrication method thereof Semiconductor package and fabrication method thereof

2007-11-16

2009-12-29

Dang, Phuc T (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S666000, C257S678000, C438S106000, C438S108000

Reexamination Certificate

active

07638879

ABSTRACT:
A semiconductor package and a fabrication method are disclosed. The fabrication method includes applying a sacrificial layer on one surface of a metal carrier, applying an insulation layer on the sacrificial layer, and forming through holes in the sacrificial layer and the insulation layer to expose the metal carrier; forming a conductive metallic layer in each through hole; forming a patterned circuit layer on the insulation layer to be electrically connected to the conductive metallic layer; mounting at least a chip on the insulation layer and electrically connecting the chip to the patterned circuit layer; forming an encapsulant to encapsulate the chip and the patterned circuit layer; and removing the metal carrier and the sacrificial layer to expose the insulation layer and conductive metallic layer to allow the conductive metallic layer to protrude from the insulation layer. In the present invention, the distance between the semiconductor package and the external device is increased, and thermal stress caused by difference between the thermal expansion coefficients is reduced, so as to enhance the reliability of the product.

REFERENCES:
patent: 5830800 (1998-11-01), Lin et al.
patent: 6710260 (2004-03-01), Seki et al.
patent: 6884652 (2005-04-01), Huang et al.
patent: 2005/0029110 (2005-02-01), Tang et al.

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