Branch lookahead prefetch for microprocessors

Details Branch lookahead prefetch for microprocessors Branch lookahead prefetch for microprocessors

2004-12-17

2009-06-23

Kindred, Alford W (Department: 2181)

Electrical computers and digital processing systems: processing

Processing control

Branching

C712S219000

Reexamination Certificate

active

07552318

ABSTRACT:
A method of handling program instructions in a microprocessor which reduces delays associated with mispredicted branch instructions, by detecting the occurrence of a stall condition during execution of the program instructions, speculatively executing one or more pending instructions which include at least one branch instruction during the stall condition, and determining the validity of data utilized by the speculative execution. Dispatch logic determines the validity of the data by marking one or more registers of an instruction dispatch unit to indicate which results of the pending instructions are invalid. The speculative execution of instructions can occur across multiple pipeline stages of the microprocessor, and the validity of the data is tracked during their execution in the multiple pipeline stages while monitoring a dependency of the speculatively executed instructions relative to one another during their execution in the multiple pipeline stages.

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