Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2004-06-01
2009-12-01
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
07627842
ABSTRACT:
Disclosed are techniques for performing the verification of circuits where corresponding signals in the circuits or specifications are encoded differently and/or redundancy occurs in the signals. Verification, such as logic equivalence checking of circuits, can be performed where the corresponding signals in the two circuits are encoded differently, and/or redundancy occurs in the signals.
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Khoo Kei-Yong
Lin Chih-Chang
Cadence Design Systems Inc.
Chiang Jack
Tat Binh C
Vista IP Law Group LLP
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