Semiconductor device having a silicon layer in a gate electrode

Details Semiconductor device having a silicon layer in a gate electrode Semiconductor device having a silicon layer in a gate electrode

2005-12-13

2009-10-06

Lindsay, Jr., Walter L (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S335000, C257SE29154

Reexamination Certificate

active

07598549

ABSTRACT:
A CMOS device includes a silicon substrate, a gate insulating film, and a gate electrode including a silicon layer doped with boron and phosphorous, a tungsten nitride layer and a tungsten layer. A ratio of a maximum boron concentration to a minimum boron concentration in a boron concentration profile across the thickness of the silicon layer is not higher than 100. The CMOS device has a lower NBTI (Negative Bias Temperature Instability) degradation.

REFERENCES:
patent: 5021356 (1991-06-01), Henderson et al.
patent: 6194259 (2001-02-01), Nayak et al.
patent: 1214540 (1999-04-01), None
patent: 2001-210726 (2001-08-01), None
patent: 2003-31683 (2003-01-01), None
Chinese Office Action dated Jan. 18, 2008, with partial Japanese and English translation.
Japanese Office Action dated Mar. 27, 2009 with Partial English Translation.

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