Circuit and method for controlling a clock synchronizing...

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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C365S227000

Reexamination Certificate

active

07606101

ABSTRACT:
A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory device. In a memory device receiving an external clock signal, a method and apparatus for executing a refresh operation is provided that includes initiating at least one refresh operation in the memory device, and ceasing generation of an internal clock signal timed with respect to the external clock signal for at least a portion of the time in which at least one refresh operation takes to complete.

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patent: 6826106 (2004-11-01), Chen
patent: 2001/0028589 (2001-10-01), Cho et al.
patent: 2000 030438 (2000-01-01), None

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