Vertical IMOS transistor having a PIN diode formed within

Details Vertical IMOS transistor having a PIN diode formed within Vertical IMOS transistor having a PIN diode formed within

2006-03-30

2009-10-27

Gurley, Lynne A. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S104000, C257S109000, C257S117000, C257S302000, C257SE27039

Reexamination Certificate

active

07608867

ABSTRACT:
A vertical IMOS-type transistor including: a stack of a first semiconductor portion doped with dopant elements of a first type, of a second substantially undoped intrinsic semiconductor portion, and of a third semiconductor portion doped with dopant elements of a second type forming a PIN-type diode; and a conductive gate placed against the stack with an interposed insulating layer.

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Hansch W. et al. “A vertical MOS-gated Esaki tunneling transistor in silicon” Thin Solid Films, Elsevier-Sequoia S.A, Lausanne, CH, vol. 369, No. 1-2, Jul. 2002 pp. 387-389, XP004200396.
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