Semiconductor memory device and control method thereof

Details Semiconductor memory device and control method thereof Semiconductor memory device and control method thereof

2008-02-07

2009-11-03

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S189160, C365S222000

Reexamination Certificate

active

07613032

ABSTRACT:
A semiconductor memory device includes a plurality of memory cells each including a first inverter and a second inverter, a first storage node connected to an output terminal of the first inverter and an input terminal of the second inverter, and a second storage node connected to an input terminal of the first inverter and an output terminal of the second inverter, a word line connected to the memory cells, and a plurality of bit lines connected to the memory cells, respectively. Input data is written to a selected memory cell, and data read from a non-selected memory cell is written again to the non-selected memory cell in write operation.

REFERENCES:
patent: 2006/0262628 (2006-11-01), Nii et al.
Leland Chang, et al., “Stable SRAM Cell Design for the 32 nm Node and Beyond”, 2005 Symposium on VLSI Technology Digest of Technical Papers, 8A-2, Jun. 2005, pp. 129-129.

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