Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2005-12-20

2008-11-11

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S320000, C257S321000, C257S324000, C257S326000, C257S316000, C257SE21682, C257SE27103, C257SE29308

Reexamination Certificate

active

07449747

ABSTRACT:
Flash memory is rapidly decreasing in price. There is a demand for a new memory system that permits size reduction and suits multiple-value memory. A flash memory of AND type suitable for multiple-value memory with multiple-level threshold values can be made small in area if the inversion layer is utilized as the wiring; however, it suffers the disadvantage of greatly varying in writing characteristics from cell to cell. Another promising method of realizing multiple-value memory is to change the storage locations. This method, however, poses a problem with disturbance at the time of operation. The present invention provides one way to realize a semiconductor memory device with reduced cell-to-cell variation in writing characteristics. The semiconductor memory has a source region and a drain region, which are formed parallel to each other, and an assist electrode which is between and parallel to the source and drain regions without overlapping, so that it uses, at the time of writing, the assist electrode as the assist electrode for hot electrons to be injected at the source side and it uses, at the time of reading, the inversion layer formed under the assist electrode as the source region or the drain region.

REFERENCES:
patent: 6803620 (2004-10-01), Moriya et al.
patent: 6888755 (2005-05-01), Harai
patent: 2004/0079988 (2004-04-01), Harai
patent: 2001-156275 (2001-06-01), None
Arai, et al., “High-Density (4.4F2) NAND Flash Technology UsingSuper-ShallowChannelProfile (SSCP) Engineering,” IEEE International Electron Devices Meeting 2000, pp. 775-778.
Kobayashi, et al., “A Giga-Scale Assist-Gate (AG)-(AND)-Type Flash Memory Cell with 20-MB/s Programming Throughput for Content-Downloading Applications,” IEEE International Electron Devices Meeting 2001 pp. 29-32.
Eitan, et al., “Can NROM, a 2 Bit, Trapping Storage NVM Cell, Give a Real Challenge to Floating Gate Cells?” International Conference on Solid State Devices and Materials 1999, pp. 522-524.

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