Methods involving memory caches

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

Reexamination Certificate

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Details

C711S118000

Reexamination Certificate

active

07472226

ABSTRACT:
A method for accessing data in memory comprising, receiving address bits associated with a data item including a first tag, an index, and a sector ID from a requestor, associating the index with a congruence class in a primary directory, determining whether the first tag matches a second tag in a plurality of tags in the congruence class, wherein the each tag of the plurality of tags uniquely identifies a cache line associated with a primary ID in the congruence class, defining the primary ID of the second tag of the primary directory that matches the first tag, determining whether the primary ID and the sector ID are present in a secondary directory entry having a one to one correspondence with a sector in a data array, and sending the data item from the sector to the requestor.

REFERENCES:
patent: 6212602 (2001-04-01), Wicki et al.
patent: 6862660 (2005-03-01), Wilkins et al.
patent: 2003/0014597 (2003-01-01), van de Waerdt

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