Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2005-08-01
2008-08-19
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S110000, C711S156000, C710S057000, C710S310000
Reexamination Certificate
active
07415580
ABSTRACT:
A system for determining a position of an element in memory comprising a memory queue with a plurality of separate entries and propagate and generate logic in communication with the memory queue such that the propagate and generate logic is operable to inspect each the separate entry in the memory queue and to output one or more vectors indicating the position of the element in the memory queue.
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patent: 6487550 (2002-11-01), Cutter
patent: 6738869 (2004-05-01), Moran et al.
patent: 6745314 (2004-06-01), Wichman
Erdem Hokenek, Robert K. Montoye, and Peter w. Cook, “Second-Generation RISC Floating Pont with Multiply-Add Fused”, in IEEE Journal of Solid-State Circuits, vol. 25, No. 5, Oct. 1990, pp. 1207-1213.
Xuejun Liang and Jack Jean, “Memory Access Scheduling and Loop Pipelining”, Department of Computer Science, Jackson State University and Department of Computer Science and Engineering, Wright State University.
Bradley David E.
Gross Fred J.
Farrokh Hashem
Hewlett--Packard Development Company, L.P.
Sparks Donald
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