Systems and methods for memory structure comprising embedded...

Details Systems and methods for memory structure comprising embedded... Systems and methods for memory structure comprising embedded...

2005-10-21

2008-08-19

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000, C257S315000, C257S317000, C257S321000, C257S324000

Reexamination Certificate

active

07414280

ABSTRACT:
A memory structure that combines multiple embedded flash memory. The flash memory can be used, e.g., as air replacement cells or back up memory, or additional memory cells. In one aspect, the flash memory cells are stacked on top of the flash memory cells and the flash memory cells share a gate layer. In another aspect, pairs of stacked flash memory cells are stacked on top of each other with each pair isolated by an isolation oxide. In another aspect, pairs of stacked flash memory cells are stacked on top of each other in an un-isolated configuration.

REFERENCES:
patent: 6011725 (2000-01-01), Eitan
patent: 6166955 (2000-12-01), Lu et al.
patent: 6815781 (2004-11-01), Vyvoda et al.
patent: 2005/0070060 (2005-03-01), Walker et al.
patent: 2005/0286287 (2005-12-01), Park et al.
Andrew J. Walker, “3D TFT-SONOS Memory Cell for Ultra-High Density File Storage Applications”, pp. 29-30, 2003, Symposium on VLSI Technology Digest of Technical Papers.

Affiliated with

Also associated with

Rating

Systems and methods for memory structure comprising embedded... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Systems and methods for memory structure comprising embedded..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systems and methods for memory structure comprising embedded... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4018237