Semiconductor integrated circuit, method for designing...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

active

07409648

ABSTRACT:
The semiconductor integrated circuit capable of reducing an interconnection width as compared with conventional one while suppressing electromigration effectively. An input unit101stores interconnection information in an interconnection information storage unit104. An arithmetic operation unit102acquires the interconnection information upon accessing the interconnection information storage unit104and acquires an arithmetic operation parameter while accessing the arithmetic operation parameter storage unit105to determine a width W of the interconnection based on these values. That is, the width W of the interconnection is made to determine upon multiplying (current i)1/3by the arithmetic operation parameter (constant), which current is caused to flow through the interconnection.

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patent: 7131096 (2006-10-01), Balsdon et al.
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patent: 6-348780 (1994-12-01), None
patent: 6-348780 (1994-12-01), None
patent: 7-21246 (1995-01-01), None
patent: 07-021246 (1995-01-01), None
patent: 2004-6833 (2004-01-01), None

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