Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-02-18
2008-08-26
Sough, Hyung (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S141000, C711S144000
Reexamination Certificate
active
07418558
ABSTRACT:
A system control apparatus and method capable of increasing the possibility of recovery from a synchronization error in snooping between system controllers are provided. The system control apparatus has a local port that holds a memory access request received externally and reoutputs it in response to an error retry instruction. A broadcast output section broadcasts the memory access request. A broadcast input section receives the broadcast memory access request. A global port holds the received memory access request. A snoop control section transmits and receives cache status information containing a result of snooping, and detects a synchronization error on the basis of the cache status information. If a synchronization error occurs, the snoop control section outputs the error retry instruction to the local port holding the memory access request that resulted in the synchronization error.
REFERENCES:
patent: 7159137 (2007-01-01), Nemawarkar et al.
patent: 2003-150573 (2003-05-01), None
Fujitsu Limited
Patel Kaushikkumar
Sough Hyung
Staas & Halsey , LLP
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