Memory utilizing oxide nanolaminates

Details Memory utilizing oxide nanolaminates Memory utilizing oxide nanolaminates

2006-07-20

2008-10-07

Hur, J. H. (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C257S324000, C365S185240, C365S185210

Reexamination Certificate

active

07433237

ABSTRACT:
One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate insulator includes oxide insulator nanolaminate layers with charge trapping in potential wells formed by different electron affinities of the insulator nanolaminate layers.

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