Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-02-22
2008-10-21
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
07441214
ABSTRACT:
In LSI design, gate level logic circuit information, standard cell library information, and package information of a circuit block constituting an LSI chip are inputted, noise analysis is performed for the LSI chip using the inputted information, and the processing is ended when the amount of noise is within a predetermined range, while a logic gate in the circuit block is selected when the amount of noise is out of the predetermined range and a bypass condenser is added to the selected logic gate. Therefore, a bypass condenser having a required capacitance can be added in the vicinity of a noise source in the circuit block, whereby the noise can be reliably restricted to the predetermined range.
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Chiang Jack
Doan Nghia M
Matsushita Electric - Industrial Co., Ltd.
Steptoe & Johnson LLP
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