FET gate structure and fabrication process

Details FET gate structure and fabrication process FET gate structure and fabrication process

2005-02-28

2008-10-07

Wojciechowicz, Edward (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S013000, C257S088000, C257S368000, C257S347000, C257S411000

Reexamination Certificate

active

07432569

ABSTRACT:
The invention includes a method of fabricating a gate structure for a field effect transistor and the gate structure. The method includes providing a crystalline silicon substrate and epitaxially growing a gate insulating layer of crystalline rare earth insulating material on the crystalline silicon substrate. A gate stack of crystalline silicon is then epitaxially grown on the layer of crystalline rare earth insulating material and doped to provide a desired type of conductivity. The gate insulating layer and the gate stack are etched and a metal electrical contact is deposited on the epitaxially grown gate stack of crystalline silicon to define a gate structure.

REFERENCES:
patent: 4479297 (1984-10-01), Mizutani et al.
patent: 2003/0183885 (2003-10-01), Nishikawa et al.
patent: 2006/0033114 (2006-02-01), Schranz

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