Semiconductor integrated circuit and construction using...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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C326S101000, C716S030000

Reexamination Certificate

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07439767

ABSTRACT:
A semiconductor integrated circuit having a first cell row including a plurality of cells disposed in a row direction, each cell having a prescribed cell width in the row direction and at least one input pin provided at a prescribed location in the row direction; and a second cell row that includes a plurality of cells substantially identical in shape to cells of the first row and is parallel to the first cell row, wherein the second cell row is displaced in the row direction relative to the first cell row so that each cell in the second cell row is out of alignment with a corresponding cell in the first cell row.

REFERENCES:
patent: 2004/0243966 (2004-12-01), Dellinger
patent: 10-313060 (1998-11-01), None

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