Method and apparatus for implementing additional registers...

Details Method and apparatus for implementing additional registers... Method and apparatus for implementing additional registers...

2006-01-09

2008-09-02

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S039000, C326S038000

Reexamination Certificate

active

07420390

ABSTRACT:
A field programmable gate array includes a plurality of programmable logic blocks to implement one or more logic functions. The field programmable gate array includes a plurality of independent registers not associated with any specific one of the plurality of programmable logic blocks. The plurality of independent registers may be programmed to support any one of the plurality of programmable logic blocks.

REFERENCES:
patent: 6011730 (2000-01-01), Sample et al.
patent: 6026481 (2000-02-01), New et al.
patent: 6212670 (2001-04-01), Kaviani
patent: 6249143 (2001-06-01), Zaveri et al.
patent: 6373279 (2002-04-01), Bauer et al.
patent: 6924663 (2005-08-01), Masui et al.
patent: 2004/0155677 (2004-08-01), Lewis et al.
patent: 2006/0230376 (2006-10-01), Yuan et al.

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