ASICs having programmable bypass of design faults

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Reexamination Certificate

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07426708

ABSTRACT:
A relatively small amount of programmable or reprogrammable logic (pro-Logic) is included in a mostly-ASIC device so that such re/programmable logic can be used as a substitute for, or for bypassing a fault-infected ASIC block (if any) either permanently or at times when the fault-infected ASIC block is about to perform a fault-infected operation (bug-infected operation). The substitution or bypass does not have to be a permanent one that is in effect at all times for the entirety of the fault-infected ASIC block. Instead affected outputs of the faulty ASIC block can be disabled from working just at the time they would otherwise initiate or propagate an error. Such fault-infected operations of the temporarily deactivated ASIC block(s) may be substituted for by appropriately programmed pro-Logic at the appropriate times. Thus, a fault-infected ASIC block that is 99% good (for example) and operates improperly just 1% of the time can continue to be gainfully used for that 99% of the time when its operations are fault free and can be blocked from having its erroneous output(s) used only in the 1% time periods (example) when its behavior is faulty. During those faulty times, a relatively small amount of the pro-Logic can be used as a fault-correcting or fault-bypassing substitute for the fault-infected ASIC block. This substitution or bypassing can be activated after initial design of the mostly-ASIC circuitry and/or after pilot production and/or mass production thereby providing for cost saving and faster time to market and/or for repair or maintenance even years after installation and use of the mostly-ASIC device.

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International Search Report, PCT/US06/02858, mailing date May 29, 2008.
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