Method of generating ASIC design database

Details Method of generating ASIC design database Method of generating ASIC design database

2006-02-13

2008-10-28

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07444602

ABSTRACT:
When a function design has been carried out by an RTL description using an HDL language, a CPU of an integrated circuit design support apparatus writes data such as a simulation time, a layout area, a timing and a power consumption into a header portion of the RTL description. The CPU stores, as one file, the RTL description comprising the header portion serving as a reuse design database, and an entity portion, in a hard disk drive.

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