Single-ended memory cell with improved read stability and...

Details Single-ended memory cell with improved read stability and... Single-ended memory cell with improved read stability and...

2007-02-13

2008-09-02

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S230050

Reexamination Certificate

active

07420836

ABSTRACT:
A memory cell for interconnection with READ and WRITE word lines and READ and WRITE bit lines includes a logical storage element such as a flip-flop formed by a first inverter and a second inverter cross-coupled to the first inverter. The storage element has first and second terminals and a storage element supply voltage terminal configured for interconnection with a first supply voltage. A WRITE access device is configured to selectively interconnect the first terminal to the WRITE bit line under control of the WRITE word line, and a pair of series READ access devices are configured to ground the READ bit line when the READ word line is active and the second terminal is at a high logical level. A logical “one” can be written to the storage element when a second supply voltage, greater than the first supply voltage, is applied to the WRITE word line, substantially without the use of a complementary WRITE bit line.

REFERENCES:
patent: 5592414 (1997-01-01), Soneda et al.
patent: 5790461 (1998-08-01), Holst
patent: 6091626 (2000-07-01), Madan
patent: 2005/0226084 (2005-10-01), Hong
patent: 2006/0274569 (2006-12-01), Joshi et al.
Wang et al., “Single-Ended SRAM with High Test Coverage and Short Test Time,” IEEE Journal of Solid-State Circuits, vol. 35, No. 1, pp. 114-118 (Jan. 2000).

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